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Google Silicon ASIC Reliability Engineer in New Taipei City, Taiwan

Google welcomes people with disabilities.

Minimum qualifications:

  • Bachelor's degree in Hardware Engineering, Electrical Engineering, Material Science, Physics, or equivalent practical experience.

  • 6 years of experience in applying Design for Reliability techniques.

  • Experience in ASIC industry and package reliability testing (e.g., HTOL, ELFR, ESD, LU, TC, THB, HAST).

  • Experience in semiconductor device physics, transistor reliability physics, CMOS technology or manufacturing.

Preferred qualifications:

  • Master's degree or PhD in Hardware Engineering, Electrical Engineering, Material Science, Physics, or equivalent practical experience.

  • Experience in semiconductor device physics, transistor reliability physics (e.g., HCI, BTI, TDDB, EM), advanced CMOS technology, semiconductor materials, and manufacturing.

  • Experience in ASIC devices and package reliability testing (e.g., HTOL, ELFR, ESD, LU, TC, THB, HAST) and reliability qualification of ICs according to JEDEC standards.

  • Experience in statistical analysis (e.g., Design Expert, JMP, Weibull), lifetime, FIT, failure rate projection of semiconductor devices and components.

  • Experience in semiconductor failure analysis tools such as SEM, TEM, FIB, EDX, CSAM, Nanoprobe, X-Ray imaging, De-encapsulation.

As a Reliability Engineer, you will play a key role in creating new consumer electronic products that meet a high bar for reliability and performance. You will work closely with the product management and design engineering teams to define standards, specify tests, and then supervise test execution and failure analysis. A broad engineering background and command of statistical methods will help to inform design of new products. Your strong interpersonal and communication skills will be key to ensuring adoption of your technical recommendations.

As part of the Pixel System Reliability team, you will be responsible for the reliability of all ICs used in Consumer Hardware products. We are also responsible for the reliability qualification of SOCs and their PMICs designed by the Google Silicon Team in the Consumer Hardware.

Google's mission is to organize the world's information and make it universally accessible and useful. Our Devices & Services team combines the best of Google AI, Software, and Hardware to create radically helpful experiences for users. We research, design, and develop new technologies and hardware to make our user's interaction with computing faster, seamless, and more powerful. Whether finding new ways to capture and sense the world around us, advancing form factors, or improving interaction methods, the Devices & Services team is making people's lives better through technology.

  • Define the custom ASIC reliability specifications based on JEDEC standards and Google product field usage conditions.

  • Use statistical methods to estimate SOC life times.

  • Execute ASIC chip-level reliability qualifications, covering ESD, LU, ELFR, and HTOL testing.

  • Collaborate with multiple teams inside and outside of Google, such as CMOS foundries, OSATs, and third-party ASIC qualification facilities.

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also https://careers.google.com/eeo/ and https://careers.google.com/jobs/dist/legal/OFCCPEEOPost.pdf If you have a need that requires accommodation, please let us know by completing our Accommodations for Applicants form: https://goo.gl/forms/aBt6Pu71i1kzpLHe2.

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