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Designer Jobs in Santa Clara, CA
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CPU Design Engineer - New College Grad 2025
Nvidia - Santa Clara, California -
ASIC Design and Integration Engineer
Apple - Santa Clara, California -
ASIC Design Engineer
Nvidia - Santa Clara, California -
Senior Product Manager, AI for Chip Design
Nvidia - Santa Clara, California -
Senior Broadcast and Media Design Engineer
Diversified - Santa Clara, California -
GPU Design Verification Engineer
Apple - Santa Clara, California -
Design Quality and Reliability Engineer
Intel - Santa Clara, California -
CPU Design Timing Engineer
Apple - Santa Clara, California -
ASIC Design Engineer - New College Grad 2025
Nvidia - Santa Clara, California -
Layout Designer - CPP
Texas Instruments - Santa Clara, California -
Senior ASIC Design Engineer
Nvidia - Santa Clara, California -
Manager, Digital Design - Mixed-Signal High-Speed I/O SerDes
Nvidia - Santa Clara, California -
ASIC Design Verification Engineer (Hardware)
Palo Alto Networks - Santa Clara, California -
CPU Physical Design Engineer
Qualcomm - Santa Clara, California -
Hardware Board Design Engineer
Qualcomm - Santa Clara, California -
Sr. Logic Design (RTL) Engineer
Capgemini - Santa Clara, California -
Circuits Physical Design Engineer
Apple - Santa Clara, California -
Analog Design Engineering Intern (Power) -Kilby Labs
Texas Instruments - Santa Clara, California
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GPU Design Engineer
Qualcomm - Santa Clara, California -
Senior Mixed Signal Design Engineer
Nvidia - Santa Clara, California -
System Design Engineer
Apple - Santa Clara, California -
Senior RF Board Design Engineer
Qualcomm - Santa Clara, California -
GPU Design Verification Engineer
Apple - Santa Clara, California -
GPU Design Verification Engineer
Apple - Santa Clara, California -
PCB Design Layout Engineer
Nvidia - Santa Clara, California -
Analog IC Design Engineer - Custom Power Products (Santa Clara)
Texas Instruments - Santa Clara, California -
Analog IC Design Manager - Custom Power Products (Santa Clara)
Texas Instruments - Santa Clara, California -
NVIDIA 2025 Internships: Mixed Signal / Circuit Design
Nvidia - Santa Clara, California -
ASIC Design Efficiency Engineer - New College Grad 2025
Nvidia - Santa Clara, California -
Senior Physical Design Methodology Engineer, PPA Improvement Technology Scaling
Nvidia - Santa Clara, California -
Senior Physical Design Methodology Engineer, Innovus Flows
Nvidia - Santa Clara, California -
Compiler Circuit Designer
Apple - Santa Clara, California -
SRAM Circuit Design Engineer
Apple - Santa Clara, California -
Sr.Staff SoC Lead design verification Engineer
Qualcomm - Santa Clara, California -
CPU Physical Design Methodology and Optimization Engineer
Apple - Santa Clara, California -
CPU Physical Design Methodology and Optimization Engineer
Apple - Santa Clara, California
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