Taking on disability together

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Senior Photonics Design Engineer, Passive Design

Intel - Santa Clara, California
Senior IP Design Verification Engineer

Intel - Santa Clara, California
Senior Photonics Design Engineer, Actives Design

Intel - Santa Clara, California
ASIC Design Verification Engineer (ASIC / Hardware)

Palo Alto Networks - Santa Clara, California
Design Engineer, Senior Director

Applied Materials - Santa Clara, California
Design Automation Engineer for MPS Engineering

Intel - Santa Clara, California
Senior Logic Design Engineer

Intel - Santa Clara, California
Design Verification Engineer

Intel - Santa Clara, California
Senior FPGA Design Engineer

Applied Materials - Santa Clara, California
Package Design Engineer

Qualcomm - Santa Clara, California
Senior E/E & Semiconductor Engineer - Digital Design (RTL) Engineer

Capgemini - Santa Clara, California
Senior IP Logic Design Engineer

Intel - Santa Clara, California
Design Verification Engineer

US Tech Solutions - Santa Clara, California
Senior Mixed-Signal Design Engineer

Nvidia - Santa Clara, California
Senior Mask Design Engineer

Nvidia - Santa Clara, California
System Architect and Design Engineer Intern

Intel - Santa Clara, California
ASIC Design Verification Engineer (Santa Clara, CA)

Qualcomm - Santa Clara, California
Senior Physical Design Methodology Engineer

Nvidia - Santa Clara, California

CPU Physical Design and Integration Engineer

Apple - Santa Clara, California
CPU Physical Design and Integration Engineer

Apple - Santa Clara, California
GPU Design Verification Engineer, Staff

Qualcomm - Santa Clara, California
IP Logic Design Engineer

Intel - Santa Clara, California
Design Quality and Reliability Engineer

Intel - Santa Clara, California
Senior Broadcast and Media Design Engineer

Diversified - Santa Clara, California
GPU Design Verification Engineer

Apple - Santa Clara, California
CPU Design Timing Engineer

Apple - Santa Clara, California
Senior ASIC Design Engineer

Nvidia - Santa Clara, California
CPU Physical Design Engineer

Qualcomm - Santa Clara, California
Sr. Logic Design (RTL) Engineer

Capgemini - Santa Clara, California
Senior Mixed Signal Design Engineer

Nvidia - Santa Clara, California
System Design Engineer

Apple - Santa Clara, California
GPU Design Verification Engineer

Apple - Santa Clara, California
GPU Design Verification Engineer

Apple - Santa Clara, California
Senior Physical Design Methodology Engineer, PPA Improvement Technology Scaling

Nvidia - Santa Clara, California
Senior Physical Design Methodology Engineer, Innovus Flows

Nvidia - Santa Clara, California
SRAM Circuit Design Engineer

Apple - Santa Clara, California