Easter Seals Jobs

Minimum qualifications:

• Bachelor's degree in Electrical Engineering or equivalent practical experience.

• 5 years of experience in micro-architecture and design of graphics or ML IPs, handling Low Precision/Mixed Precision Numerics.

• 3 years of experience architecting networking ASICs from specification to production.

• Experience developing RTL for ASIC subsystems using SystemVerilog.

• Experience in micro-architecture, design, verification, logic synthesis, and timing closure.

Preferred qualifications:

• Experience in SoC designs and integration flows.

• Experience working with software teams optimizing the hardware/software interface.

• Experience estimating performance by analysis and modeling, and defining and driving performance test plans.

• Knowledge of arithmetic units, bus architectures, accelerators, or memory hierarchies.

• Knowledge of high performance and low power design techniques.

• Proficiency in a procedural programming language (e.g., C++, Python, Go).

Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

In this role, you will be part of a team developing AI accelerators in data centers and have dynamic, multi-faceted responsibilities in areas such as project definition, design, and implementation. You will participate in the design, architecture, documentation, and implementation of the next generation of data center accelerators.

Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.

• Evaluate different silicon solutions for executing Google’s data center AI accelerator roadmap: off-the-shelf components, vendor co-developments, custom designs, and chiplets.

• Create high performance hardware/software interfaces.

• Collaborate closely with software, verification, emulation, physical design, packaging, and silicon validation stakeholders to ensure that designs are complete, correct, and performant.

• Own microarchitecture of compute intensive IPs and subsystems.

• Identify and drive power, performance, and area improvements for the modules owned.

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also https://careers.google.com/eeo/ and https://careers.google.com/jobs/dist/legal/OFCCPEEOPost.pdf If you have a need that requires accommodation, please let us know by completing our Accommodations for Applicants form: https://goo.gl/forms/aBt6Pu71i1kzpLHe2.