Job Information
Apple ASIC Design Engineer in Beaverton, Oregon
ASIC Design Engineer
Beaverton,Oregon,United States
Hardware
Imagine what you could do here. At Apple, new insights have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Sophisticated, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it. Join us to help deliver the next excellent Apple product. Do you enjoy working on challenges that no one has solved yet? As a member of our complex group, you will get the outstanding and rewarding opportunity to craft upcoming products that will delight and encourage millions of Apple’s customers every single day. Are you ready to join a team transforming hardware technology? We are searching for a dedicated engineer to join our exciting team of problem solvers.
Description
As an ASIC Design Engineer, your responsibilities span various aspects of SOC design: - Write microarchitecture and/or design specifications - Design, implement, and debug complex logic designs - Integrate complex IPs into the SOC - Support all front end integration activities like Lint, CDC, Synthesis, and ECO - Work with other specialists that are members of the SOC Design, SOC Design - Verification, Emulation, STA, and Physical Design teams - Collaborate with software and systems teams to ensure a high quality
Minimum Qualifications
BS and a minimum of 10 years relevant industry experience
Verilog RTL Logic Design experience.
Key Qualifications
Preferred Qualifications
Experience writing specifications and converting them to design.
Experience with multiple clock domains and asynchronous interfaces.
Hands on experience in all aspects of the chip development process with proficiency in front end tools and methodologies
Experience or knowledge of system architecture, CPU & IP Integration, and power and clock management designs desirable.
Ability to communicate optimally across all internal groups
Familiarity with software and operating concepts a plus
Familiarity with scripting languages like Perl, Python, or TCL a plus
Education & Experience
Additional Requirements
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