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Microsoft Corporation Principal Physical Design Engineer in Bangalore, India

Microsoft’s mission is to empower every person and every organization on the planet to achieve more. Join us to achieve this by building the world’s computer. The Artificial Intelligence Silicon Engineering team is seeking passionate, driven, and intellectually curious computer/electrical engineers to deliver premium-quality designs once considered impossible. We are responsible for delivering cutting-edge AI designs that can perform complex and high-performance functions in an extremely efficient manner.

We are looking for a Principal Physical Design Engineer to work in the dynamic Microsoft Artificial Intelligence System on Chip (AISoC) Silicon team. The candidate must be a highly motivated self-starter who will thrive in this cutting-edge technical environment. You will be part of the design team, driving many facets of high performance, high bandwidth designs.

Responsibilities

In this role you will:

As a Principal Physical Design Engineer, you will be responsible for Physical Design tasks at block, sub-chip, and/or full-chip level. The tasks will include Floorplanning, Synthesis, Placement, CTS and custom clocking, Routing, Static Timing, Physical Verification, Formal Equivalency, Power Efficiency, IR-Drop, and EM. You may also be involved in Physical Design flow development/automation and evaluation of and recommendations for technology, IP, and vendor selection.

You are expected to be able to work with limited direction, have keen attention to detail, and be able to provide crisp status of progress, issues, and risks on the program to the management team. Occasional travel may be required.

Qualifications

Required/Minimum Qualifications

  • Bachelor's or Master’s in Electrical or Computer Engineering or related field with 12+ years of experience

  • Experience in tapeouts of complex ASICs in leading edge technology

Preferred Qualifications:

  • Strong expertise in one or more of the following: synthesis, floorplanning, placement, clock/power grid construction, routing, low power methodologies, and signoff steps (FV, LPV, Extraction, STA, EMIR, Physical Verification, Power Analysis)

  • Strong scripting skills

  • Proven experience in creating and delivering hard macros and knowledge of guidelines for their integration in SoCs

  • Good understanding of foundry tech files and rule decks

Microsoft Cloud Background Check :

  • Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include, but are not limited to, the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud background check upon hire/transfer and every two years thereafter.

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Microsoft is an equal opportunity employer. Consistent with applicable law, all qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations (https://careers.microsoft.com/v2/global/en/accessibility.html) .

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