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Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for passionate engineers to help achieve that mission.

The Microsoft Silicon Team is continuing to revolutionize consumer electronic devices & Cloud Computing.  We are looking for an experienced Principal Analog Mask Layout Engineer who is innovative and has a passion for IC Layout design of including high-speed CMOS Interface D2D, SERDES, and foundational analog blocks for next generation Consumer & Cloud Computing Devices.

The SCIPS Analog group designs high performance mixed signal ASICs in leading edge CMOS technology using custom IC design tools. You will work in a diverse, dynamic environment and interact with other teams to help design and test great products!

The ideal candidate is a self-starter, highly motivated engineer with excellent technical & interpersonal skills, used to working independently or as a key member of a fast-moving design team.

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Responsibilities

• The primary responsibility of this position is to lead Schematic-to-GDS delivery of cutting edge, high-performance, high-speed, low-power IP designs for interconnectivity solutions and fundamental Analog circuit blocks for various products for Microsoft in various process nodes including deep FinFet, following industry best practices.

• Coordinate tasks with junior members of the team, develop plans for Analog Mask Layout execution, follow processes/methodologies to deliver IP blocks.

• Manage on-boarding/offboarding of additional external contingent staff to supplement existing team for overflow

• You are proficient in the use of Cadence Virtuoso (or other equivalent) design tools and flows and will perform and supervise layout implementation of analog intensive IP’s.You will establish flows/methodologies/processes for execution along with peers.

• You will work along with other members of the team to deliver IP’s, including project planning, schedule tracking, report generation.You will follow / augment / put-in-place processes/methodologies in place for high quality execution along with peers.

Qualifications

• You should have at least 10 years of Analog Mask Layout execution and IP delivery of medium-large complexity designs. You must have 5 plus years of Lead experience, including day-to-day task coordination and overall delivery responsibilities.

• You have delivered Analog Layouts successfully in mass production.

• You have detailed knowledge of EDA tools for Cadence, Mentor, Synopsys, including advanced SDL.

• You have experience with layout of high-performance analog blocks such as VCOs, Charge-Pumps, Interpolators, BandGap, OTAs, PLLs, Data Converters, LDOs, RX/TX blocks, references and other foundational analog blocks.

• In-depth knowledge of analog design and layout guidelines for high-performance, high-speed and/or low-power designs. You have experience with floor-planning, block-level routing and large macro level assemblies.

• You have knowledge of analog layout techniques such as common-centroid layout, matching, symmetrical layouts, signal shielding, use of dummy devices, thermal aware layouts with consideration for EM/IR and other analog specific guidelines.

• You have worked in deep finfet design nodes.

• You are a self-starter with the ability to define and adhere to a schedule.

• You have good inter-personal skills, you are able to interface with a variety of external partners (customers, architects, designers, project managers, etc.) and are able to deliver complete layouts to customers.

Ability to meet Microsoft, customer and/or government security screening requirements may be required for this role. These requirements may include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer

Microsoft is an equal opportunity employer. Consistent with applicable law, all qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations (https://careers.microsoft.com/v2/global/en/accessibility.html) .