Job Information
Meta Design Verification Engineering Manager in Bangalore, India
Summary:
Manage an ASIC design verification team responsible for various processing blocks in a SOC. Drive verification planning and execution, innovative verification methodology development, functional and code coverage closure. Participate in silicon architecture, micro-architecture development, interface with Architecture, SW/FW, Design, Modeling, Emulation, and Post-Silicon Validation teams
Required Skills:
Design Verification Engineering Manager Responsibilities:
Manage an ASIC design verification team responsible for various processing blocks in a SOC. Drive verification planning and execution, innovative verification methodology development, functional and code coverage closure. Participate in silicon architecture, micro-architecture development, interface with Architecture, SW/FW, Design, Modeling, Emulation, and Post-Silicon Validation teams
Partner with internal and external cross-functional teams, across all levels of a corporation, from executives, team managers and individual contributors including development engineers, capacity planners and supply chain experts
Contribute to and drive development of and maintain overall silicon strategy aligned to corporation's Long Range Plan objectives
Collaborate with IP development teams, and participate in, and support soft and hard IP identification, selection and IP licensing
Build, lead, and support a team of ASIC engineers through strategic hiring, training, and guidance to drive on-time and on-budget product delivery
Contribute to, analyze, review SOWs from vendors, supporting documentation, requirements sets that meet the needs of internal customers
Support engineering teams to define, debug, implement and deliver total solutions around purpose built ASICs
Define, implement and maintain key performance indicators (KPI) for areas of responsibility
Partner with technical program management and supply chain team members to manage external development partners, suppliers and vendors
Minimum Qualifications:
Minimum Qualifications:
B.S. or M.S. degree in Computer Engineering or Electrical Engineering, relevant technical field, or equivalent practical experience
12+ years experience in ASIC/SoC design verification
3+ years of experience as a People Manager
Clear understanding of complexities involved with various design verification tools, including Synopsys VCS or Cadence Xcelium Simulator, Verdi, JasperGold or VC Formal
Track record of first-pass success in ASIC Development
Experience working across multiple projects and adjusting priorities in partnership with stakeholders
Experience managing and delivering UVM constrained random test benches
Experience with interpreting functional specs and creating comprehensive test plan
Preferred Qualifications:
Preferred Qualifications:
Hands-on experience with complex subsystems like memory/LPDDR/HBM, cache, PCIE or Network on chip including performance verification
In depth knowledge of at least one of these areas - video coding standards, signal processing algorithms, neural networks and machine learning concepts, and/or other neural network development framework
Experience in formal verification techniques and methodologies
Industry: Internet
Meta
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